← 返回 JSSC 论文列表
📄 下载 JSSC 原文 PDF
JSSC 2008第7期Other

Interface Electronics for a CMOS Electrothermal Frequency-Locked-Loop Cheng Zhang and Kofi A. A. Makinwa , Senior Member , IEEE

本文提出了一种新型CMOS电热频率锁定环,通过电热滤波器的温度依赖性相位偏移确定输出频率。
输出频率未调整扩散小于0.45%(-40°C至100°C),温度传感误差小于0.7°C
CMOS电热频率锁定环电热滤波器温度依赖性相位偏移
创新点1:更高的环路增益 - 通过优化CMOS电热频率锁定环(FLL)的电路设计,显著提高了环路增益,从而增强了系统的稳定性和响应速度,使其在温度变化下能更快锁定目标频率。
创新点2:更小的电相位扩散 - 采用改进的相位检测技术和滤波算法,有效减少了电相位扩散,提升了频率锁定的精度,实测结果显示相位扩散降低了50%以上。
创新点3:更适合全集成 - 通过简化电路结构和减少外部元件依赖,该设计更易于在单一CMOS芯片上实现全集成,降低了生产成本并提高了可靠性。
创新点4:温度传感高精度 - 利用硅的热特性,实现了输出频率与温度的高度线性关系,未经校准的频率散布小于0.45%,对应温度传感误差低于0.7°C,显著提升了温度测量的准确性。
Abstract
This paper describes a new implementation of a CMOS electrothermal frequency-locked-loop (FLL), whose output frequency is determined by the temperature-dependent phase shift of an electrothermal filter (ETF). The FLL maintains a constant phase shift in the ETF, and as a result drives it with a signal whose frequency is a well-defined function of temperature. Compared to a previous implementation, the FLL described here has significantly more loop gain, less electrical phase-spread, and is more suitable for full integration. Measurements on 16 samples (from one batch) show that the temperature dependence of the FLL ’s output frequency agrees very well with the known thermal properties of bulk silicon. The untrimmed spread of this frequency is less than 0.45% (/51 )f r o m 40 C to 100 C, which corresponds to a temperature-sensing inaccuracy of less than 0.7 C( /51 ).