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Subthreshold Source-Coupled Logic Circuits for Ultra-Low-Power Applications Armi
提出一种新型超低功耗源耦合逻辑电路,适用于弱反型区工作。
0.18μm CMOS, 300mV, 10pA, <1fJ
超低功耗电路源耦合逻辑弱反型区CMOS逻辑电路功耗延迟积
▸使用最小尺寸pMOS晶体管作为高阻负载
▸通过调整尾偏置电流线性缩放功耗和频率
▸在0.18μm CMOS工艺下实现极低功耗
Abstract
er , Member , IEEE, Yusuf Leblebici, Senior Member , IEEE,
and Eric Vittoz , Life Fellow, IEEE
Abstract—This paper presents a novel approach for imple-
menting ultra-low-power digital components and systems using
source-coupled logic (SCL) circuit topology, operating in weak
inversion (subthreshold) regime. Minimum size pMOS transistors
with shorted drain-substrate contacts are used as gate-controlled,
very high resistivity load devices. Based on the proposed ap-
proach, the power consumption an