← 返回 JSSC 论文列表JSSC 2008第8期RF & Wireless65nmLNANeural Network Accelerator
A Wideband W-Band Receiver Front-End in 65-nm CMOS Mehdi Khanpour Student Member
65纳米CMOS工艺下的宽带W波段接收前端设计
13 dB增益, 8.5至10 dB噪声系数, 89 mW功耗
W波段CMOS低噪声放大器混频器变压器反馈
▸采用变压器反馈的低噪声放大器(LNA)
▸双平衡Gilbert-cell混频器
▸宽频带输入阻抗匹配
Abstract
in P. V oinigescu, Senior Member , IEEE
Abstract—A 75-to-91 GHz receiver front-end, consisting of a
three-stage cascode low-noise amplifier (LNA), a double-balanced
Gilbert-cell mixer and a differential DC-to-9 GHz IF buffer, is
reported in 65-nm general purpose (GP) CMOS technology. The
noise and input-impedance matched LNA employs a cascode input
stage with shunt-series, transformer feedback. A theoretical and
experimental comparison with a conventional inductor-feedback
LNA indicates 0.5–1 dB