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JSSC 2008第9期Other0.18μm CMOS

Match Sensing Using Match-Line Stability in Content-Addressable Memories (CAM)

提出一种基于匹配线稳定性的内容可寻址存储器匹配检测方案,显著降低能耗。
144x144 三元CAM阵列,功耗降低50%
内容可寻址存储器匹配线检测低功耗设计稳定性分析CMOS实现
利用匹配线稳定性区分匹配与未匹配状态
采用初始电荷激励匹配线并观察电压变化
结合流水线搜索线架构降低功耗
Abstract
This paper presents a match-line (ML) sensing scheme that distinguishes a match from a miss by first shunting every ML with a fixed negative resistance, then exciting the MLs with an initial charge, and subsequently observing their voltage developments. It is shown that the voltage on the matched ML will grow to /86/68/68, as in an unstable system, whereas the voltage on a missed ML will decay to zero, as in a stable system. Since the initial excitation charge on the ML’s can be as low as the noise level in the system, this scheme can approach the minimum possible energy consumption level for match-line sensing. We have implemented, in 0.18 m CMOS, a 144 144 ternary CAM array that includes the stability-based sensing scheme along with two previously-reported sensing schemes. The measured re- sults confirm the power savings of the proposed sensing scheme. In addition, the CAM includes a pipelined search-line (SL) architec- ture that can reduce the SL portion of CAM power by up to 50%.