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JSSC 2008第11期RF & Wireless180nm

A 2 Gbs Bi-Directional Inter-Chip Data Transceiver With Differential Inductors f

该论文展示了一种在180纳米CMOS技术中实现的2 Gb/s双向芯片间数据收发器,采用差分电感器减少串扰并节省面积。
180nm CMOS, 2 Gb/s, 64% area reduction
双向通信差分电感器芯片间通信噪声免疫面积优化
使用正交差分电感对实现双向通信
差分电感器提高噪声免疫性并减少面积
无需复杂电路技术建立双向通信系统
Abstract
i Yoshida, Student Member , IEEE, Noriyuki Miura , Member , IEEE, and Tadahiro Kuroda , Fellow, IEEE Abstract—A 2 Gb/s bi-directional inter-chip data transceiver is experimentally demonstrated for the first time in 180 nm CMOS technology. Two orthogonal differential inductor pairs are ver- tically overlapped to make a bi-directional channel. Using these channels, bi-directional communication system is established without any complex circuit techniques. The crosstalk interfer- ence problem in chan