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JSSC 2008第11期Memory45nmSRAM

Techniques to Extend Canary-Based Standby 866868 Scaling for SRAMs to 45 nm and

通过canary细胞反馈机制实现SRAM待机功耗的动态优化
45nm CMOS, 待机功耗优化, DRV跟踪
SRAM待机功耗canary细胞PVT变化亚阈值电压
采用canary细胞反馈机制跟踪PVT变化
提出亚阈值电压下控制逻辑的电路设计
建立新的分析模型以优化canary细胞在变异环境下的性能
Abstract
scaling is an efficient technique to reduce SRAM leakage power during standby mode. The data retention voltage (DRV) defines the minimum that can be applied to an SRAM cell without losing data. The conventional worst-case guard-banding approach selects a fixed standby supply voltage at design time to accommodate the variability of DRV , which sacrifices potential power savings for non-worst-case scenarios. We have proposed a canary-based feedback to achieve aggressive power savings by tracking PVT v