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JSSC 2008第12期Data Converters90nm

A 150 MSs 133 22W 7 bit ADC in 90 nm Digital CMOS Geert V an der Plas Member IE

本文介绍了一种在90纳米数字CMOS工艺中实现的150MS/s、133μW、7位ADC，采用两种新技术显著提高了能量效率。
150MS/s, 133μW, 6.4ENOB, 40dB SNDR, 10fJ/conversion step
ADC能量效率CMOSSAR比较器
▸比较器基异步二进制搜索（CABS）量化技术
▸SAR控制算法应用于比较器（SAR-CC）
▸两步骤1位粗和6位细架构
Abstract
, IEEE Abstract—In recent years the energy efficiency of A/D converters has been improved significantly. Only 5 years ago [3] an energy effi- ciency of 1 pJ/conversion step was considered state-of-the-art. Now power efficiencies are reported in fJ/conversion step. In this paper two new converter techniques are presented that further improve upon reported energy efficiencies of A/D converters. The first tech- nique implements the quantization with a comparator-based asyn- chronous binary search (CABS).