← 返回 JSSC 论文列表JSSC 2008第12期Clocking & PLLs90nmVCONeural Network Accelerator
A 5665 GHz Injection-Locked Frequency Tripler With Quadrature Outputs in 90-nm C
90nm CMOS工艺下实现5665 GHz注入锁定三倍频器，输出正交信号。
60.6 GHz自由振荡频率，56.5–64.5 GHz锁定范围，9.6 mW功耗
频率三倍频器注入锁定毫米波正交压控振荡器再生峰值
▸创新点1：注入锁定三倍频技术，通过硬限幅器和负阻单元实现频率三倍频，显著扩展了锁定范围至56.5–64.5 GHz，提升了毫米波信号的生成效率。
▸创新点2：两级环形振荡器设计，结合单级多相输入滤波器，实现了60 GHz正交输出信号的高精度生成，优化了频率稳定性和相位噪声性能。
▸创新点3：再生峰值优化增益带宽，通过负反馈环路和再生峰值技术，显著提升了50 Ω输出缓冲器的增益带宽性能，确保了信号的高质量传输。
▸创新点4：低功耗设计，整体电路在1 V电源下仅消耗9.6 mW，输出缓冲器消耗14.2 mW，实现了毫米波电路的高效低功耗运行。
Abstract
ohn R. Long , Member , IEEE
Abstract—A sub-harmonic injection-locked tripler multiplies a
20-GHz differential input to 60-GHz quadrature (I/Q) output sig-
nals. The tripler consists of a two-stage ring oscillator driven by a
single-stage polyphase input filter and 50-
/10I and Q-signal output
buffers. Each gain stage incorporates a hard limiter to triple the
input frequency for injection locking and a negative resistance cell
with two positive feedback loops to increase gain. Regenerative
peaking