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A 34 MBs MLC Write Throughput 16 Gb NAND With All Bit Line Architecture on 56 nm
一款16Gb MLC NAND闪存通过全位线架构和性能增强模式实现34MB/s写入吞吐量
34MB/s写入吞吐量（MLC模式），60MB/s（SLC模式）
NAND闪存全位线架构MLC写入吞吐量电流感应
▸创新点1：全位线架构（ABL）是一种系统创新，通过同时激活所有位线而非传统的一半位线，显著提升了编程吞吐量至34 MB/s（MLC模式）和60 MB/s（SLC模式），同时降低了功耗。
▸创新点2：电流感应技术是一种电路创新，替代主流电压感应技术，解决了ABL架构下的信号干扰问题，确保了高速数据读取的准确性，为高并行度操作提供了基础。
▸创新点3：分层列架构是一种方法创新，通过优化数据路径的层级结构，抵消了ABL带来的面积开销，同时维持了高吞吐量，实现了面积与性能的平衡。
▸创新点4：双倍数据缓冲区设计是一种系统创新，通过扩展缓冲区容量支持最大并行度操作，确保高速编程时数据流的连续性，直接提升了整体吞吐量。
Abstract
A 16 Gb 4-state MLC NAND flash memory aug-
ments the sustained program throughput to 34 MB/s by fully
exercising all the available cells along a selected word line and by
using additional performance enhancement modes. The same chip
operating as an 8 Gb SLC device guarantees over 60 MB/s pro-
gramming throughput. The newly introduced All Bit Line (ABL)
architecture has multiple advantages when higher performance
is targeted and it was made possible by adopting the “current
sensing” (as opposed to