Abstract
Fatih Hamzaoglu, Member , IEEE, Kevin Zhang , Senior Member , IEEE, Yih Wang , Member , IEEE,
Hong Jo Ahn, Uddalak Bhattacharya , Member , IEEE, Zhanping Chen , Member , IEEE, Y ong-Gee Ng,
Andrei Pavlov, Member , IEEE, Ken Smits , Member , IEEE, and Mark Bohr , Fellow, IEEE
Abstract—A high-performance low-power 153 Mb SRAM is
developed in 45 nm high-k Metal Gate technology. Dynamic
SRAM PMOS forward-body-bias (FBB) and Active-Controlled
SRAM VCC in Sleep are integrated in the design to lower A