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JSSC 2009第1期Other0.13μm

RazorII: In Situ Error Detection and Correction for PVT and SER Tolerance

RazorII技术通过原位错误检测与校正实现PVT变化和软错误容忍,提升处理器能效
0.13μm工艺下实现33%能耗降低
动态电压调节错误检测工艺变异容忍软错误恢复能效优化
基于锁存节点瞬态检测的原位错误检测机制
动态电压频率调整消除安全裕量
软错误(SER)容忍的处理器设计
Abstract
t Member , IEEE, Sanjay Pant , Member , IEEE, Wei-Hsiang Ma, Student Member , IEEE, Sudherssen Kalaiselvan, Kevin Lai, David M. Bull, and David T. Blaauw, Member , IEEE Abstract—Traditional adaptive methods that compensate for PVT variations need safety margins and cannot respond to rapid environmental changes. In this paper , we present a design (RazorII) which implements a flip-flop with in situ detection and architectural correction of variation-induced delay errors. Error detection is based on