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JSSC 2009第2期Memory130nmSRAM

SRAM Cell Stability: A

提出SRAM单元动态数据稳定性标准,揭示噪声容限可高于传统静态噪声容限。
130 nm CMOS
SRAM动态稳定性噪声容限亚阈值CMOS
创新点1:动态数据稳定性标准 - 提出基于动态环境(访问与非访问条件交替)的SRAM单元数据稳定性评估方法,突破了传统静态DC蝴蝶曲线三交点准则的限制,通过动态特性分析揭示真实噪声容限可显著高于传统静态噪声容限(SNM)。
创新点2:扩展噪声容限方法 - 利用单元访问时间远小于单元时间常数的特性,在亚阈值SRAM中实现噪声容限的扩展,通过动态稳定性准则重新定义边界条件,提升电路在低电压下的可靠性。
创新点3:模拟验证方法创新 - 开发针对动态数据稳定性准则的仿真验证流程,结合130nm CMOS工艺硅测量结果,证实动态稳定性理论的有效性,并提供设计参数(时序与静态参数)的优化权衡依据。
创新点4:亚阈值操作时序优化 - 通过合理选择访问与恢复时间,利用亚阈值操作的长时时间常数特性维持数据稳定性,为低功耗SRAM设计提供新的时序控制策略。
Abstract
SRAM cell stability assessment is traditionally based on static criteria of data stability requiring three coincident points in DC butterfly curves. This definition is based on static (DC) char- acteristics of the cell transistors. We introduce the dynamic criteria of cell data stability knowing that the cell operates in a dynamic en- vironment alternating between access and non-access conditions. The proposed definition of the dynamic data stability criteria in- troduces a new bound for the cell static noise margin (SNM). It reveals that the true noise margin of the cell can be made con- siderably higher than the conventional SNM once the cell access time is sufficiently shorter than the cell time-constant. This phe- nomena can be used to extend the noise margin in (partial) sub- threshold SRAMs. Moreover , a simulation method for verification of the dynamic data stability criteria is presented. Silicon measure- ment results in 130 nm CMOS technology confirms the concept of dynamic data stability and designer’s ability to trade timing and static parameters. Finally, it is shown that the long time constant due to the subthreshold operation of the cell can be exploited to maintain data stability with proper choice of access and recovery time.