Abstract
ry Chan, Shao Yu Chou, Hsien-Yu Pan, Jui-Jen Wu, Robin Lee, H. J. Liao, and
Hiroyuki Yamauchi, Member , IEEE
Abstract—A 0.6 V 45 nm dual-rail SRAM design utilizing
an adaptive voltage regulator targeted for the SRAM compiler
application is proposed for the first time. The proposed work
describes an adaptive mechanism to generate Cell-Vdd (CVDD),
which tracks a certain voltage offset with respect to the Logic-Vdd
(VDD). This dual-rail solution provides a mean to lower the VDD
down to 0.6 V. In thi