Abstract
Thonnart, Xuan-Tu Tran,
Alexandre Valentian, Didier Varreau, Pascal Vivet, Xavier Popon, and Hugo Lebreton
Abstract—In complex embedded applications, optimisation and
adaptation of both dynamic and leakage power have become an
issue at SoC grain. A fully power-aware globally-asynchronous
locally-synchronous network-on-chip (NoC) circuit is presented
in this paper. Network-on-chip architecture combined with a
globally-asynchronous locally-synchronous paradigm is a natural
enabler for DVFS mechani