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JSSC 2009第4期Power Management0.35μm

Regulated Switched-Capacitor Doubler With Interleaving Control for Continuous Output Regulation Feng Su, Student Member , IEEE

一种双分支1.8V至3.3V调节开关电容倍压器,具有低输出纹波和连续输出调节功能。
0.35μm CMOS, 1.8V-3.3V, 500kHz, 10mV纹波, 10mA-180mA负载范围
开关电容倍压器低输出纹波交错控制双环反馈CMOS
相位延迟门驱动方案消除短路和反向电流
双分支交错控制实现连续输出调节
双环反馈电容倍增器提升稳定性
Abstract
A dual-branch 1.8 V to 3.3 V regulated switched-ca- pacitor voltage doubler with an embedded low dropout regulator is presented. For the power stage, the power switches are individually controlled by their phase signals using a phase-delayed gate drive scheme, and are turned on and off in proper sequence to elimi- nate both short-circuit and reversion currents during phase transi- tions. For the regulator , the two branches operate in an interleaving fashion to achieve continuous output regulation with small output ripple voltage. Dual-loop feedback capacitor multiplier is adopted for loop compensation and a P-switch super source follower with high current sinking capability is inserted to drive switching capac- itive load, and push the pole at the gate of the output power tran- sistor to high frequency for better stability. The regulated doubler has been fabricated in a 0.35 m CMOS process. It operates at a switching frequency of 500 kHz with an output capacitor of 2 F, and the maximum output voltage ripple is only 10 mV for a load current that ranges from 10 mA to 180 mA. The load regulation is 0.0043%/mA, and the load transient is 7.5 s for a load change of 160 mA to 10 mA, and 25 s for a load change of 10 mA to 160 mA.