JSSC 2009第5期RF & Wireless65nm

A 65 nm CMOS 30 dBm Class-E RF Power Ampliﬁer With 60 PAE and 40 PAE at 16 dB Ba

65nm CMOS工艺下实现30dBm输出、60% PAE的E类射频功率放大器

65nm CMOS, 30dBm Pout, 60% PAE, 40% PAE@16dB back-off

E类功率放大器CMOS功率附加效率高压器件自偏置技术

▸方法创新：采用新型高压扩展漏极厚氧化层器件，显著提高了器件的耐压能力和功率处理能力，同时保持了65 nm CMOS工艺的兼容性，无需额外掩模或工艺步骤。

▸电路创新：创新的自偏置技术通过动态调整偏置电压，确保在不同输出功率水平下均能实现高功率附加效率（PAE），在30 dBm输出时PAE达到60%，在16 dB回退时PAE仍保持40%。

▸系统创新：通过级联结构设计，结合标准薄氧化层器件和新型高压扩展漏极厚氧化层器件，优化了功率放大器的整体性能，实现了高输出功率和高效率的平衡。

▸性能创新：在2 GHz频率下，该功率放大器在30 dBm输出功率时PAE达到60%，在16 dB回退时PAE仍保持40%，展示了其在高效功率放大领域的领先性能。

Abstract

A 30 dBm single-ended class-E RF power ampliﬁer (PA) is fabricated in a baseline 65 nm CMOS technology. The PA is constructed as a cascode stage formed by a standard thin-oxide device and a dedicated novel high voltage extended-drain thick- oxide device. Both devices are implemented without using addi- tional masks or processing steps. The proposed PA uses an inno- vative self-biasing technique to ensure high power-added efﬁciency (PAE) at both high output power /40/80/111/117/116/41and power ba