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A 0.55 V 60 dB-DR Fourth-Order Analog Baseband Filter Marcello De Matteis, Stefano D’Amico , Member , IEEE
提出一种0.55V供电、12MHz截止频率的四阶低通滤波器,采用改进偏置电路和单运放双二阶结构实现低压高性能。
0.13μm CMOS, 0.55V, 12MHz, 3.4mW, 8dBm IIP3
低压滤波器连续时间滤波器偏置电路数字调谐四阶滤波
▸改进偏置电路实现0.55V超低电压工作
▸单运放双二阶单元结构节省功耗
▸数字控制电容阵列实现截止频率可调
Abstract
A 0.55 V supply voltage fourth-order low-pass con- tinuous-time filter is presented. The low-voltage operating point is achieved by an improved bias circuit that uses different opamp input and output common-mode voltages. The fourth-order filter architecture is composed by two Active- /71/109 /82/67biquadratic cells, which use a single opamp per-cell with a unity-gain-band- width comparable to the filter cut-off frequency. The 3 dB filter frequency is 12 MHz and this is higher than any other low-voltage continuous-time filter cut-off frequency. The 3 dB frequency can be adjusted by means of a digitally-controlled capacitance array. In a standard 0.13 /109CMOS technology with /48 /50/53 /86 and /48 /51/86, the filter operates with a supply voltage as low as 0.55 V. The filter /40/116/111/116/97/108 /97/114/101/97 /61 /48 /52/55 /109/109/50/41consumes 3.4 mW. A 8 dBm-in-band IIP3 and a 13.3 dBm-out-of-band IIP3 demonstrate the validity of the proposal.