A Local Random V ariability Detector With Complete Digital On-Chip

Abstract

The pronounced impact of process uncertainties on the power-performance characteristics of systems has necessitated characterization and design efforts that aim to maximize the para- metric yield of the design. This paper describes a completely dig- ital on-chip technique to measure local random variation of FET current. The measurement circuit consists of a series connection of an array of independently selectable devices and a single common load device. The voltage at the intermediate node indicates the vari- ation from device to device, and is digitized by a voltage-controlled oscillator and on-chip frequency counters. This eliminates analog current measurements and enables very rapid, all-digital measure- ment of single FET variability, which can also be carried out in the field. The effectiveness of the technique is illustrated using mea- surements results from a test chip designed in a 45-nm SOI process.