← 返回 JSSC 论文列表JSSC 2009第10期Clocking & PLLs0.18μm CMOS
A High-Frequency Clock Distribution Network Using Inductively Loaded Standing-Wa
提出一种基于电感负载驻波振荡器的高频时钟分布网络,实现低偏斜、低抖动和低功耗。
9.4 GHz时钟频率,峰峰值抖动5.2 ps,时钟偏斜0.8 ps
时钟分布分布式谐振器电感负载驻波振荡器低功耗
▸使用均匀振幅和均匀相位的驻波振荡器
▸采用分布式谐振器实现全局时钟分布
▸利用分布式局部LC谐振网络降低功耗
Abstract
ent paper introduces a resonant clock gen-
eration and distribution scheme that uses uniform amplitude and
uniform phase standing wave oscillators in order to distribute
a high-frequency clock signal with low skew, low jitter, and low
power. A suitable distributed resonator for a global clock distri-
bution that is inductively loaded transmission line generating a
uniform amplitude and uniform phase standing wave is realized
through detailed analysis of a standing wave on a loaded trans-
mission