JSSC 2009第10期RF & Wireless130nmEqualizer

High-Speed Optical Receivers With Integrated Photodiode in 130 nm CMOS

本文介绍了一种在130纳米CMOS工艺中集成光电二极管的高速光学接收器设计。

4.5 Gbit/s, BER < 10^-12, 74.16 mW

高速光学接收器CMOS光电二极管差分拓扑低噪声设计功耗优化

▸创新点1：采用差分光电二极管拓扑结构（电路创新）。该设计通过差分结构有效抵消共模噪声，提升光电二极管的带宽性能，克服了传统CMOS工艺中光电二极管带宽不足的瓶颈，实现了4.5 Gbit/s的高速数据传输。

▸创新点2：优化接收器链中的均衡器（系统创新）。通过精确设计的均衡器补偿光电二极管的高频衰减特性，显著提升信号完整性，使系统在850 nm调制光下达到5 Gbit/s的极限速率，且误码率低于10^-12。

▸创新点3：通过弱反偏设计降低功耗（方法创新）。将部分电路偏置在弱反型区，在保持极低噪声（TIA噪声优化）的同时，功耗从138 mW降至74.16 mW，降幅达46.3%，解决了低噪声设计与高功耗的矛盾。

▸创新点4：集成化光电二极管与接收器（工艺创新）。在130 nm CMOS工艺中实现光电二极管与接收器的单片集成，避免了分立器件的寄生效应，灵敏度达到-56 dBm（4.5 Gbit/s），为低成本片上光通信系统提供解决方案。

Abstract

. Steyaert , Fellow, IEEE Abstract—The design and measurement of two optical receivers with integrated photodiode in 130 nm CMOS is presented. The low bandwidth, which is typical for photodiodes in CMOS technolo- gies, is circumvented by a differential photodiode topology on the one hand and by including an optimized equalizer in the receiver chain on the other hand. The low responsivity of a CMOS photo- diode is compensated by a very low-noise design for the differential TIA. The disadvantage o