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A 1074 dB SNR Multi-Bit Sigma Delta ADC With 1-PPM THD at 012 dB From Full Scale
采用新型技术的5位量化器二阶Sigma Delta调制器，实现107.4 dB SNR和1-PPM THD。
105.9 dB SNDR, 107.4 dB DR, 31.25-KHz带宽, 8-MHz采样频率, 14.7 mW功耗
Sigma Delta调制器5位量化器动态范围噪声整形DAC阵列
▸简化的DAC阵列便于实现
▸高阶截断噪声整形提高对模拟缺陷的容忍度
▸扩展的动态范围支持最大输入信号摆动
Abstract
A second order sigma delta modulator (SDM) with a
5-bit quantizer has been presented using several novel techniques:
simplified DAC arrays for easy implementation, high-order trun-
cation noise shaping for increased tolerance to analog imperfec-
tions, and an extended dynamic range for a maximum input signal
swing of up to
/48
/49/50dB/70/83(Full Scale). With truncation filters and
a pseudo SDM in the DSP , the truncation and saturation errors are
compensated through the DAC arrays and the DSP. Th