← 返回 JSSC 论文列表JSSC 2009第11期Power Management0.18μm CMOSTDC
A 15 GHz All-Digital Spread-Spectrum Clock Generator Sheng-You Lin and Shen-Iuan
介绍了一种15 GHz全数字扩频时钟发生器，采用0.18μm CMOS工艺，降低电磁干扰和抖动。
电磁干扰降低10.48 dB，峰值抖动28.4 ps，RMS抖动4 ps @1.5 GHz
全数字扩频时钟发生器电磁干扰时间数字转换器数字控制振荡器相位锁定环
▸混合信号相位和频率检测器减少抖动和延迟
▸采用时间放大器的Vernier时间数字转换器提高分辨率
▸数字控制振荡器配备分辨率增强电路
Abstract
igital spread-spectrum clock generator
(SSCG) has been fabricated in a 0.18
m CMOS process. The
analysis and design of this all-digital SSCG is presented. A
mixed-signal phase and frequency detector is adopted to reduce
the jitter, eliminate a digital adder, and also reduce latency. A
V ernier time-to-digital converter (TDC) with time amplifiers is
realized to enhance the timing resolution of the TDC and to track
the frequency modulation in the SSCG. A digitally controlled
oscillator with a reso