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JSSC 2009第12期Data Converters90nmPipeline ADCOp-Amp

A 12b 50 MSs Fully Differential Zero-Crossing Based Pipelined ADC

一种基于零交叉技术的12位50MS/s全差分流水线ADC,具有高能效和鲁棒性。
90nm CMOS, 4.5mW, 88fJ/step
ADC零交叉技术全差分斩波稳定开关电容电路
创新点1:基于零交叉的开关电容电路(ZCBC)技术,通过消除传统运放的高增益和稳定性需求,显著降低功耗(4.5 mW)并提升能效(FOM 88 fJ/step),属于电路创新。
创新点2:无共模反馈(CMFB)的全差分设计,利用差分信号增强电源抑制比(PSRR)和能效,简化电路结构并提高鲁棒性,属于系统架构创新。
创新点3:高效的斩波偏移补偿技术,采用低功耗斩波方法有效抑制比较器偏移,提升12位精度的稳定性,属于方法创新。
创新点4:改进的参考电压切换技术,避免使用栅极升压开关,降低设计复杂度并增强可靠性,属于电路优化创新。
Abstract
Fellow, IEEE Abstract—Zero-crossing based switch capacitor circuits have been introduced as alternatives to op-amp based circuits for eased design considerations and improved power efficiency. This work further improves the resolution, power efficiency, and robustness of previous zero-crossing based circuits (ZCBCs) and features a 90 nm CMOS, offset compensated, fully differential, zero-crossing based, 12b, 50 MS/s, pipelined ADC requiring no CMFB. The power consumption is 4.5 mW. The FOM is 88 fJ