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JSSC 2009第12期Other65nm

A 150 GHz Amplifier With 8 dB Gain and 436 dBm 8011597116in Digital 65 nm CMOS Us

65nm CMOS工艺下实现的150 GHz放大器,增益8.2 dB,带宽27 GHz。
150 GHz, 8.2 dB增益, 27 GHz带宽, 25.5 mW功耗, 1.1V供电
150 GHz放大器65nm CMOS毫米波集成电路虚拟建模微带线
简化拓扑结构减少匹配损耗并扩展带宽
采用虚拟填充微带线作为紧凑且符合密度规则的匹配元件
并行栅极馈电的晶体管布局提供5.7 dB的MSG
Abstract
yo Seo, Member , IEEE, Basanth Jagannathan, John Pekarik , Member , IEEE, and Mark J. W . Rodwell, Fellow, IEEE Abstract—A 150 GHz amplifier in digital 65 nm CMOS process is presented. Matching loss is reduced and bandwidth extended by simplistic topology: no dc-block capacitor, shunt-only tuning and radial stubs for ac ground. Dummy-prefilled microstrip lines, with explicit yet efficient dummy modeling, are used as a com- pact, density-rule compliant matching element. Transistor layout with parall