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A 06-V Zero-IFLow-IF Receiver With Integrated Fractional-N Synthesizer for 24-GH
设计了一种0.55-0.65V超低压双模接收器，适用于2.4GHz ISM频段，兼容蓝牙和ZigBee标准。
90nm CMOS, 0.6V, 67dB增益, 16dB噪声系数, 10.5dBm IIP3, 127dBc/Hz相位噪声, 32.5mW功耗, 1.7mm²面积
超低压双模接收器2.4GHz ISM频段频率合成器CMOS
▸超低压工作（0.55-0.65V）
▸高度集成（包含RF前端、模拟基带和频率合成器）
▸克服低压设计挑战的架构和电路技术
Abstract
t Member , IEEE, Shih-An Yu, Student Member , IEEE, Yiping Feng , Student Member , IEEE,
and Peter R. Kinget , Senior Member , IEEE
Abstract—Supply voltage reduction with process scaling has
made the design of analog, RF and mixed mode circuits increas-
ingly difficult. In this paper , we present the design of an ultra-low
voltage, low power and highly integrated dual-mode receiver for
2.4-GHz ISM-band applications. The receiver operates reliably
from 0.55–0.65 V and is compatible with commercial