← 返回 JSSC 论文列表JSSC 2010第3期RF & Wireless0.18微米LNA
A Compact Wideband CMOS Low Noise Amplifier With Gain Flatness Enhancement Y ueh-Hua Y u, Student Member , IEEE, Y ong-Sian Y ang, and Yi-Jan
本文提出了一种紧凑型0.18微米CMOS宽带增益平坦低噪声放大器。
16.4 dB增益, 2.1 dB噪声系数, 50-900 MHz带宽, 1.8 V电压, 14.4 mW功耗
CMOS低噪声放大器宽带增益平坦噪声消除
▸噪声消除技术：采用创新的噪声抵消方法，通过电路设计有效降低噪声系数至2.1 dB，显著提升信噪比（方法创新）
▸栅极电感增益峰值技术：通过独特的栅极电感设计增强增益平坦度，实现50-900 MHz频段内仅0.4 dB的增益波动（电路创新）
▸无源电感设计：完全摒弃传统被动电感，实现芯片核心面积仅145μm×247μm的紧凑型设计（系统创新）
▸宽带性能优化：结合上述技术，在14.4 mW低功耗下同时达成16.4 dB增益与宽频带特性（性能创新）
Abstract
This paper presents a compact 0.18- m CMOS wideband gain-flattened low noise amplifier (LNA). The low noise characteristic of the LNA is achieved by the noise canceling technique and the gain flatness is enhanced by the gate-induc- tive gain-peaking technique. In addition to extending flat-gain bandwidth, the proposed gain-peaking technique results in better wideband noise canceling and quick gain roll-off outside the de- sired signal band to reject interference. Without using any passive inductor, the core size of the fully-integrated CMOS LNA circuit is only 145 m 247 m. The measured gain and noise figure of the CMOS LNA are 16.4 dB and 2.1 dB, respectively. The gain variation of the LNA is 0.4 dB from 50 to 900 MHz. Operated at 1.8 V , the chip consumes 14.4 mW of power.