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A6 -22W Chip-Area-Efficient Output-Capacitorless LDO in 90-nm CMOS Technology Jia
90纳米CMOS工艺中实现的高稳定性、快速瞬态响应的无输出电容LDO。
90nm CMOS, 0.75V供电, 100mA负载能力, 3.78mV/V线调整率, 0.1mV/mA负载调整率
无电容低压差稳压器纳米级工艺瞬态响应伪Class-AB
▸采用单米勒电容补偿实现高稳定性
▸伪Class-AB操作提升瞬态响应
▸嵌入式电压尖峰检测电路减少电压波动
Abstract
g Leung , Senior Member , IEEE
Abstract—An output-capacitorless low-dropout regulator
(LDO) compensated by a single Miller capacitor is implemented
in a commercial 90-nm CMOS technology. The proposed LDO
makes use of the small transistors realized in nano-scale tech-
nology to achieve high stability, fast transient performance and
small voltage spikes under rapid load-current changes without
the need of an off-chip capacitor connected at the LDO output.
Experimental result verifies that the propo