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A High-Speed Low-Power Multi-VDD CMOSSIMOX SRAM With LV-TTL Level InputOutput Pi
采用多电压供电的低功耗高速CMOS/SIMOX SRAM设计
0.2μm CMOS/SIMOX, 1-3.3V, 32K-word×9-bit
多电压供电低功耗SRAMCMOS/SIMOX开关电源线阻抗寄生双极效应
▸多电压供电（1V、2V、3.3V）优化功耗与性能
▸新型开关电源线阻抗方案保证1V存储单元写入可靠性
▸利用SOI MOSFET寄生双极效应增大读取电流
Abstract
ated Memory Cells
Nobutaro Shibata, Mayumi Watanabe, and Hideomi Okiyama
Abstract—The use of multiple power supplies with different
output voltages has a great advantage in that it makes it possible
to realize high performance ULSIs with low power dissipation.
This paper presents a high-speed low-power SRAM that employs
three power supplies (1, 2, and 3.3 V). A 1-V power supply is
mainly used in the SRAM core to save standby and/or active
power , while a 2-V supply is used in critical components