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A 269 K 3145 Mbs Soft 3240032208 BCH Decoder Chip for DVB-S2 System Yi-Min Lin C
本文提出了一种用于DVB-S2系统的软BCH解码器芯片，通过处理最不可靠位降低复杂度并保持纠错性能。
90 nm CMOS, 314.5 Mb/s, 26.9 K gate-count
BCH解码器DVB-S2系统软信息错误纠正硬件复杂度
▸软BCH解码器处理最不可靠位
▸无需Chien搜索的错误定位评估器
▸Björck–Pereyra错误幅度求解器（BP-EMS）
Abstract
n-Yi Lee , Member , IEEE
Abstract—This paper provides a soft Bose–Chaud-
huri–Hochquenghem (BCH) decoder chip with soft information
from the LDPC decoder for the DVB-S2 system. In contrast with
the hard BCH decoder, the proposed soft BCH decoder that deals
with least reliable bits can provide much lower complexity with
similar error-correcting performance. Moreover, the error locator
evaluator is proposed to evaluate error locations without the Chien
search for higher throughput, and the Björck–