← 返回 JSSC 论文列表JSSC 2010第11期Memory40nmSRAM
A Low-Supply-V oltage-Operation SRAM With HCI Trimmed Sense Amplifiers Atsushi Ka
提出一种利用热载流子注入技术调整感测放大器偏移电压的低电压SRAM方案，提升读取速度和稳定性。
40nm CMOS, 0.6V电源电压, 偏移电压降低76mV, 读取频率提升40%, 故障率降低6倍
低电压设计感测放大器热载流子注入偏移电压修调SRAM稳定性
▸利用热载流子注入（HCI）技术进行感测放大器偏移电压修调
▸重复修调提升效果
▸低电压操作下显著提升读取速度和单元稳定性
Abstract
amu Hirabayashi, Keiichi Kushida, Y uki Fujimura, and
Tomoaki Y abe, Member , IEEE
Abstract—This paper proposes a new scheme utilizing a small
offset-voltage (V os) sense amplifier (SA) to reduce the deteriora-
tion of the read speed and cell stability at low power supply. This
concept has been introduced to realize a low-voltage-operation
SRAM with a small area penalty. The transistor threshold voltage
(Vth) shift caused by hot carrier injection (HCI) [1] is used for
V os trimming after chip fab