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JSSC 2010第12期RF & Wireless65nm

A 60-GHz Band 2 2 Phased-Array Transmitter in 65-nm CMOS Wei L. Chan, Student Member , IEEE, and John R. Long , Member , IEEE

65nm CMOS工艺实现的60GHz波段2×2相控阵发射机,支持二维波束成形。
65nm CMOS, 1V, 590mW, 11dBm输出, 20dB增益, 16%效率
60GHz相控阵CMOS发射机波束成形毫米波
创新点1:LO相位偏移实现方位和仰角二维波束控制(方法创新)。通过LO相位偏移技术,在65-nm CMOS工艺中实现了方位和仰角平面的二维波束控制,支持直接或IF上变频,显著提升了波束控制的灵活性和精度。
创新点2:全电流泄放技术抑制闪烁噪声(电路创新)。在最终上变频混频器中采用全电流泄放技术,有效抑制了闪烁噪声,提升了系统的信噪比和整体性能。
创新点3:动态LO偏置抑制载波泄漏(电路创新)。通过动态LO偏置技术,显著降低了载波泄漏,载波泄漏控制在20.5 dBc至0.5 dB之间,提高了信号的纯净度和传输效率。
创新点4:高功率附加效率与增益(系统创新)。发射放大器的最大功率附加效率超过16%,增益在54至61 GHz范围内高于17 dB,展现了出色的能量转换效率和信号放大能力。
Abstract
A 60-GHz band 2 2 phased-array transmitter implemented in 65-nm bulk CMOS is described. Two-dimensional beam steering in the azimuthal and elevation planes is imple- mented via LO phase shifting in a transmitter that also supports direct or IF up-conversion. Full current bleeding in the final upconversion mixer suppresses flicker noise, and dynamic LO biasing suppresses carrier feedthrough. The 2.9 1.4 mm /50chip consumes a total of 590 mW from a 1-V supply when driving all four channels at a maximum saturated output power of 11 dBm, with 20 dB gain per transmitter. Carrier leakage varies between 20.5 dBc 0.5 dB and sideband rejection is 25 to 28 dBc among the four transmitters when measured on the same die. The mea- sured phase noise is /49 /55 /49dB higher than the theoretical 21.6 dB increase in the phase noise due to 12 frequency multiplication of the injected LO. Maximum power-added efficiency of the transmit amplifier is greater than 16%, and gain is above 17 dB from 54 to 61 GHz.