← 返回 JSSC 论文列表JSSC 2011第1期Digital Circuits40nm
A 40 nm 222 mW H264 Full-HD Decoding 25 Power Domains 14-Core Application Proces
40纳米14核多媒体应用处理器，支持H.264全高清解码，功耗222mW。
40 nm, 222 mW H.264 Full-HD, 10.6 GB/s memory bandwidth
多媒体处理器H.264解码电源门控堆叠芯片SoC内存带宽
▸25个电源域实现粗粒度电源门控
▸片上电源开关电路减少浪涌电流
▸堆叠芯片SoC技术实现DRAM重布线
Abstract
In this paper we introduce a 14-core application
processor for multimedia mobile applications, implemented in
40 nm, with a 222 mW H.264 full high-definition (full-HD) video
engine, a 124 mW 40 M-polygons/s 3D/2D graphics engine, and
a video/audio multiprocessor for various Codecs and image
processing. The application processor has 25 power domains to
achieve coarse-grain power gating for adjusting to the required
performance of wide range of multimedia applications. The simple
on-chip power swit