← 返回 JSSC 论文列表JSSC 2011第3期Analog Circuits65nmOp-Amp
A 1-V Process-Insensitive Current-Scalable Two-Stage Opamp With Enhanced DC Gain
提出一种低电压下工艺不敏感且电流可扩展的两级运放设计，通过伪共源共栅补偿和体偏置技术提升直流增益。
1-V 65-nm CMOS, 直流增益提升4倍（12 dB）, 单位增益频率提升40%, 相位裕度保持稳定
两级运放伪共源共栅补偿体偏置技术低电压工艺不敏感
▸伪共源共栅补偿技术实现工艺不敏感和电流可扩展设计
▸体偏置技术提升直流增益而不影响输出摆幅
▸在相同功耗下显著提升运放性能
Abstract
mad Taherzadeh-Sani and Anas A. Hamoui
Abstract—A pseudo-cascode compensation technique is pro-
posed to enable a process-insensitive and current-scalable design
of the classical two-stage opamp at low supply voltages, without
requiring any additional power dissipation. Furthermore, a
bulk-biasing technique is proposed to enhance the dc gain of the
two-stage opamp, without affecting its output-voltage swing and
without requiring any additional power dissipation. To compare
the performance advant