Abstract
This work addresses the device modeling challenges
of production-quality, state-of-th e-art, silicon-on-sapphire (SOS)
processes. Differences between SOS , silicon-on-insulator (SOI),
and bulk CMOS are highlighted, with emphasis on the key dif-
ferences in the modeling methodology. For RF and low-power
applications, SOS has distinct advantages over SOI, such as
reduced parasitics, better linearity, and enhanced electrical iso-
lation. Y et little is reported in t he literature about modeling of