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JSSC 2011第5期Clocking & PLLs65nm

A 300-GHz Fundamental Oscillator in 65-nm CMOS Technology

65nm CMOS工艺下实现300GHz基本振荡器,采用输出级反馈至核心的创新拓扑结构。
65nm CMOS, 0.8V, 3.7mW, 300GHz
载波生成频率生成毫米波振荡器螺旋电感传输线
采用输出级反馈至核心的振荡器拓扑结构
通过仿真与传统交叉耦合对电路进行比较
在65nm CMOS工艺下实现高频振荡
Abstract
xistence of gain at high frequencies, revealing the speed limitations of other circuits in a given technology. This paper presents an oscillator topology that employs feedback from an output stage to the core, thus achieving a high speed. The behavior of the proposed oscillator is formulated and simulations are used to compare it with the conventional cross-coupled pair circuit. Three prototypes realized in 65-nm CMOS technology operate at 205 GHz, 240 GHz, and 300 GHz, each drawing 3.7 mW from