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JSSC 2011第5期Memory65nm/90nmSRAM

A Large 27V8472VDD Tolerant Zigzag 8T SRAM With Area-Efficient Decoupled Differen

该论文提出了一种新型Zigzag 8T SRAM结构,在低电压下实现更快的读写速度和更小的面积。
430 mV (65nm 32Kb), 250 mV (65nm 4Kb), 230 mV (90nm 64Kb)
SRAM低电压设计Zigzag 8T差分传感面积效率
采用Zigzag 8T结构提高性能
使用2T差分传感技术加速读写
面积效率比传统DS8T提高15%
Abstract
Nanometer SRAM cannot achieve lower VDDmin due to read-disturb, half-select disturb and write failure. This paper demonstrates quantitative performance advantages of a zigzag 8T-SRAM (Z8T) cell over the decoupled single-ended sensing 8T-SRAM (DS8T) with write-back schemes, which was previously recognized as the most area-efficient cell under large /86/84/72 /86/68/68conditions. Since Z8T uses only 1T for each de- coupled read-port, faster 2T differential sensing (D /50S) can be implemented within