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A 7 mW 20 MHz BW Time-Encoding Oversampling Converter Implemented in a 008 mm 65
本文提出了一种新型时间编码过采样转换器，采用65纳米CMOS工艺，实现低功耗高性能ADC设计。
63dB动态范围, 61dB峰值SNDR, 20MHz带宽, 7mW功耗
时间编码过采样转换器低功耗65纳米CMOS自振荡PWM
▸时间编码量化器(TEQ)替代多比特量化器
▸利用时间分辨率交换幅度分辨率
▸自振荡脉宽调制器(PWM)设计
Abstract
This work presents an area- and power-ef ficient re-
alization of a new time-encoding oversampling converter (TEOC)
consisting of a third-order continuous time (CT) loop filter and a
self-oscillating pulse-width modulator (PWM). The modulator dis-
plays similar performance to that of a standard multibit CT-
modulator but has the complexity of a single bit design. The time-
encoding quantizer (TEQ) is implemented inside a modulator
by replacing a multibit quantizer. An innovative TEQ is used to
ove