← 返回 JSSC 论文列表JSSC 2011第7期RF & WirelessPLL
A Low Phase Noise, Wideband and Compact CMOS PLL for Use in a Heterodyne 802.15.3c Transceiver David Murphy, Student Member , IEEE, Qun Jane Gu
一款用于802.15.3c外差收发器的低相位噪声宽带紧凑型CMOS PLL
相位噪声优于-97.5 dBc/Hz@1 MHz,功耗和面积优于现有技术
低相位噪声宽带PLL毫米波CMOS频率合成器
▸低噪声、宽带毫米波VCO设计,调谐范围达22.9%
▸采用可编程传输线作为频率调谐元件,实现精细离散调谐和寄生参数最小化
▸直接生成43.2 GHz至51.84 GHz的6个等间距频率,适用于外差架构
Abstract
A low phase noise, wideband, mm-wave, integer-N PLL that is capable of supporti ng an 802.15.3c heterodyne trans- ceiver is reported. The PLL can generate 6 equally spaced tones from 43.2 GHz to 51.84 GHz, which is suitable for a hetero- dyne architecture with . Phase noise is measured directly at the frequency and is better than 97.5 dBc/Hz@1 MHz across the entire band. The reported frequency synthesizer is smaller, exhibits less phase noise, and consumes less power than prior art. In addition, the tone corresponds to the fundamental of the VCO as opposed to a higher harmonic. Central to the PLL performance is the design of a low-noise, wideband, mm-wave VCO with a 22.9% tuning range. Fine dis- crete tuning and minimization of parasitics is achieved using a pro- grammable transmission line as a frequency tuning element.