JSSC 2011第9期Data Converters0.13μmCMOS Image Sensor

A 240-framess 21-Mpixel CMOS Image Sensor With Column-Shared Cyclic ADCs Seunghy

一款低功耗、高帧率的CMOS图像传感器，采用列共享循环ADC架构

240帧/s, 2.1百万像素, 90μW/通道, 500M像素/s, 300mW总功耗

CMOS图像传感器循环ADC低功耗高帧率列共享

▸创新点1：列共享循环ADC架构（电路创新）。通过两列共享一个循环ADC的设计，显著减少了ADC的数量，降低了功耗和面积，同时保持了高分辨率和高速转换性能。

▸创新点2：两级堆叠ADC布局（系统创新）。采用两级堆叠的ADC布局方式，优化了芯片的空间利用率，减小了像素间距，实现了紧凑的传感器设计。

▸创新点3：分布式时钟方案（方法创新）。通过级联中继器的分布式时钟方案，有效降低了峰值电流需求，减少了功耗和噪声，提升了系统的稳定性和效率。

▸创新点4：低功耗设计（电路创新）。设计的10-bit ADC在1.5V供电下仅消耗90μW/通道，总功耗为300mW，实现了高性能与低功耗的平衡。

Abstract

This paper proposes a low-power 240 frames/s 2.1 M-pixel CMOS image sensor with column-shared cyclic (CY) ADCs. Two-column shared CY-ADC architecture and two-level stacked ADC placement are employed for low-power and small pixel pitch design. The proposed CY-ADC uses only one OTA and four capacitors. Distribute d clocking scheme using cascaded repeaters is proposed to reduce the required peak current. The prototype sensor was fabricated in a 0.13- m1 P 4 Mp r o c e s sw i t h pixel pitch of 2.25