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JSSC 2011第9期Power Management130nmBuck Converter

A 90–240 MHz Hysteretic Controlled DC-DC Buck Converter With Digital Phase Locked Loop Synchronization Pengfei Li, Student Member , IEEE

提出一种基于数字锁相环的高频滞环控制DC-DC降压转换器,实现宽输出电压范围内的恒定工作频率。
90-240MHz, 33%-80%输出转换范围, 80%效率@180MHz, 40ns负载响应, <25mV纹波
DC-DC降压转换器数字锁相环滞环控制高频开关恒定频率
采用数字锁相环(D-PLL)实现频率锁定
消除开关频率对占空比或电压转换范围的依赖
可编程D-PLL参数并支持外部时钟同步
Abstract
This paper reports a digital phase locked loop (D-PLL) based frequency locking technique for high frequency hysteretic controlled dc-dc buck converters. The proposed con- verter achieves constant operat ing frequency over a wide output voltage range, eliminating the dependence of switching fre- quency on duty cycle or voltage conversion range. The D-PLL is programmable over a wide range of parameters and can be synchronized to a clock reference to ensure proper frequency lock and switching operation outside undesirable power supply resonance bands. The stability and loop dynamics of the proposed converter is analyzed using an an alog equivalent PLL behavioral model which describes the dc-dc con verter as a voltage-controlled oscillator (VCO). We demonstrate a 90–240 MHz single phase converter with fast hysteretic con trol and output conversion range of 33%–80%. The converter achieves an ef ficiency of 80% at 180 MHz, a load response of 40 ns for a 120 mA current step and a peak-to-peak ripple less than 25 mV. The circuit was implemented in 130 nm digital CMOS process.