← 返回 JSSC 论文列表
📄 下载 JSSC 原文 PDF
JSSC 2011第10期Data Converters0.13μmDelta-Sigma ADCNeural Network Accelerator

A 0.6-V 82-dB 28.6- W Continuous-Time Audio Delta-Sigma Modulator

设计了一种低电压低功耗的四阶单比特连续时间Delta-Sigma调制器,适用于音频应用。
0.13μm CMOS, 0.6V, 28.6μW, 82dB DR, 79.1dB SNDR
低电压低功耗Delta-Sigma调制器音频应用连续时间
采用输入前馈拓扑以减少内部信号摆动
将前馈路径求和嵌入量化器以提高能效
开发了增益增强的全差分放大器和体驱动轨到轨输入CMFB电路
Abstract
The design of a low-voltage low-power fourth-order single-bit continuous-time Delt a-Sigma modulator is presented in this paper for audio applications. The modulator employs an input-feedforward topology in or der to reduce internal signal swings, thus relaxes the linearity and slew rate requirements on ampli fiers leading to low-voltage operation and low-power consumption. The energy ef ficiency is further improved by em- bedding the summation of feedfo rward paths into the quantizer. For low-voltage operation, a gain-enhanced fully-differential amplifier and a body-driven rail-to-rail input CMFB circuit are developed. The modulator , implemented in a 0.13- ms t a n d a r d C M O St e c h n o l o g yw i t hac o r ea r e ao f0 . 1 1m m,a c h i e v e sa n 82-dB dynamic range (DR), and a 79.1-dB peak signal-to-noise and distortion ratio (SNDR) over a 20-kHz signal bandwidth. The power consumption of the modulator is 28.6 W under a 0.6-V supply voltage. The achieved performance make it one of the best among state-of-the-art sub-1-V modulators in terms of two widely used figures of merit.