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Capacitively Coupled Non-Contact Probing Circuits for Membrane-Based Wafer-Level
提出一种电容耦合非接触探针电路,用于膜基晶圆级测试,具有低功耗和高灵敏度。
1.2V 90nm, 1Gbps, 0.5mW RX core功耗
电容耦合非接触探针膜基晶圆测试去偏斜器低功耗
▸创新点1:新型去偏斜器设计(方法创新):采用纯数字核心晶体管构建,具有稳定的前馈架构,有效消除信号偏斜,提升信号完整性。
▸创新点2:低通滤波器抑制振铃(电路创新):结合高灵敏度接收器,有效抑制探针卡复杂布线结构引起的振铃现象,提升信号质量。
▸创新点3:高灵敏度接收器(电路创新):在1.2V 90nm工艺下实现,功耗仅为0.5mW,支持1Gbps高速操作,显著提高接收灵敏度。
▸创新点4:系统级测试方案(系统创新):实现基于膜的晶圆级同步测试,具有高鲁棒性,适用于大规模集成电路测试场景。
Abstract
A capacitively coupled probing circuit with a novel
de-skewer, a low-pass filter and a high-sensitivity receiver is
proposed to realize a membra ne-based wafer-level simu ltaneous
testing robustly. The de-skewer can be designed by only digital
core transistors and has stable feed-forward architecture. The
receiver with the low-pass filter can suppress the und esirable
ringing caused by the complex wiring structure in the probe card.
A probe chip and a 300 mm DUT-wafer are fabricated in a 1.2 V
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