← 返回 JSSC 论文列表JSSC 2011第10期Analog Circuits0.7μm
Design and Analysis of a Self-Oscillating Class D Audio Amplifier Employing a Hysteretic Comparator
设计并分析了一种采用迟滞比较器的三阶自激振荡D类音频放大器。
0.7μm CMOS, 116.5 dB动态范围, 0.0012% THD+N, 125 mW@8Ω, 84%效率@1W
D类放大器自激振荡迟滞比较器THD音频放大器
▸创新点1：采用迟滞比较器实现自激振荡，通过消除传统载波发生器的需求简化系统架构，降低设计复杂度和功耗，同时保持高精度（THD+N低至0.0012%）
▸创新点2：提出低成本迟滞补偿技术，有效抑制高输出功率（如1.45W时）下的非线性失真，使THD+N在90%最大功率下仍低于0.006%，显著提升音频保真度
▸创新点3：基于三阶自振荡架构的Class D放大器设计，通过等效模型理论分析THD性能，实现84%以上的高效率（1W输出时）与116.5dB动态范围，兼顾能效与信号质量
▸创新点4：在0.7μm CMOS工艺下集成6mm²紧凑面积，结合5V电源供电方案，为便携式音频设备提供高功率密度（125mW@8Ω）与低失真（0.0012% THD+N）的解决方案
Abstract
A third-order self-oscillating class D audio ampli fier that utilizes a hysteretic compara tor is presented. The design is an- alyzed and its THD is theoretica lly determined by employing an equivalent model, that relates the approach to natural sampling pulse-width modulation. The architecture eliminates the require- ment for a high-quality c arrier generator. A l ow-cost hysteresis compensation technique is utilized to enhance distortion perfor- mance at high output power levels. An implementation is presented in a 0.7 mC M O Sp r o c e s s .It achieves a dynamic range (DR) of 116.5 dB, and a THD+N of 0.0012%, while delivering a power of 125 mW into an 8 load at 1 kHz. The THD+N is under 0.006% up to 90% of the maximum output power. The ampli fier can deliver 1.45 W into the load with a THD of 5% with a 5 V power supply. The ef ficiency is greater than 84% for output power larger than 1 W. The area of t he ampli fier is 6 mm .