Ultrahigh-Speed Low-Power DACs Using InP HBTs for Beyond-100-Gb/s/ch Optical

Abstract

This paper presents the circuit designs and mea- sured performance of two ultrahigh-speed low-power 6-b digital-to-analog converters ( DACs) using InP-based hetero- junction bipolar transistors (HBTs) for beyond-100-Gb/s/ch optical transmission systems. The first design is based on an R-2R ladder-based current-steering architecture with a novel double-sampling technique that relaxes the speed restraints for the DAC and helps achieve ultrahigh-speed operation. The DAC with the double-sampling tec hnique achieves an excellent sampling speed of up to 32 GS/s with low power consumption of 1.4 W. The second design is based on a new timing alignment technique. The DAC with the timing alignment technique operates at a sampling rate of 28 GS/s with very low power consumption of 0.95 W and achieves an excellent figure of merit (0.53 pJ per conversion step). It provides a clear multilevel modulated signal for QAM transmission and can be applied to beyond-100-Gb/s/ch optical transmission systems.