← 返回 JSSC 论文列表JSSC 2011第11期RF & Wireless0.18μm
A 0.24-nJ/bit Super-Regenerative Pulsed UWB Receiver in 0.18- mC M O S
采用超再生架构的0.18μm CMOS脉冲超宽带接收器，功耗0.24nJ/bit。
0.18μm CMOS, 1.5V, 10Mbps, 0.24nJ/bit, 灵敏度-66/-61dBm
超宽带接收器超再生架构低功耗CMOS自动调谐
▸超再生架构降低前端放大器功耗
▸双载波频率工作（3.494/3.993GHz）
▸集成数字锁相环自动调谐电路
Abstract
This paper describes a receiver system design for im- pulse-radio ultra-wideband (IR - U W B )t h a to p e r a t e sa tt w oc a r - rier frequencies—3.494 and 3.993 GHz—with a 10-Mbps data rate. To reduce the power consumption of the front-end ampli fiers, a super-regenerative architecture is used. An integrated circuit, im- plemented in a CMOS 0.18- m technology and operating with a 1.5-V power supply, exhibits ene rgy consumption of 0.24 nJ/bit with a measured sensitivity of 66 and 61 dBm at 3.494 and 3.993 GHz, respectively, with a BER of . Also included on the integrated circuit is an automatic tuning circuit based on a digital phase-locked loop that is used to set the resonant frequency of the super-regenerative block.