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A 280-GHz Schottky Diode Detector in 130-nm Digital CMOS
130纳米CMOS工艺中实现的280GHz肖特基二极管探测器阵列
250 V/W响应度, 33 pW/Hz噪声等效功率, 1.6 mW功耗
肖特基二极管CMOS太赫兹探测器片上天线毫米波成像
▸创新点1：采用多晶硅栅分离技术（PGS）显著降低肖特基二极管的串联电阻，使其截止频率达到2 THz，这是方法创新，提升了高频探测性能
▸创新点2：集成255×250 μm²的片上贴片天线，实现280 GHz信号的直接接收，属于系统创新，简化了毫米波成像系统的外部组件需求
▸创新点3：设计低噪声放大器（LNA）将响应度从250 V/W提升至80 kV/W，属于电路创新，大幅提高了探测灵敏度
▸创新点4：在130 nm数字CMOS工艺下实现280 GHz探测器阵列，工艺创新突破传统硅基工艺的频率限制，芯片仅消耗1.6 mW@1.2 V
Abstract
A2 2 array of 280-GHz Schottky-barrier diode
detectors with an on-chip patch antenna (255 250 m )i sf a b -
ricated in a 130-nm logic CMOS process. The series resistance of
diode is minimized using poly-gat e separation (PGS), and exhibits
a cut-off frequency of 2 THz. Each detector unit can detect an
incident carrier with 100-Hz 2-MHz amplitude modulation.
At 1-MHz modulation frequency, the estimated voltage respon-
sivity and noise equivalent power ( N E P )o ft h ed e t e c t o ru n i ta r e