A Sub-mW All-Digital Signal Component Separator With Branch Mismatch Compensation for OFDM LINC Transmitters Tsan-Wen Chen, Ping-Y uan Tsai, Jui-Y uan Y u

Abstract

Linear ampli fication with nonlinear components (LINC) is an attractive techni que for achieving linear ampli fica- tion with high ef ficiency. This paper presents a sub-mW all-digital signal component separator (S CS) design for OFDM LINC trans- mitters, including a phase calculator and a digital-control phase shifter (DCPS) pair. In addition, a digital mismatch compensation scheme is proposed and integrated into the SCS to reduce the design complexity of the power ampli fier. This chip is manufac- t u r e di na9 0n ms t a n d a r dC M O Sp r o c e s sw i t ha na c t i v ea r e ao f 0.06 mm . The DCPS can generate phase-modulated signals at 100 MHz with 8-bit resolution and RMS error 9.33 ps (0.34 ). The phase calculation can be p erformed at a maximum speed of 50 MHz using a 0.5 V supply voltage, resulting in a 73.88% power reduction. Comparing to state-of-the-art, the power consumption of the overall SCS is only 949.5 W which minimizes the power overhead for an LINC transmitter. This SCS with the branch mismatch compensation provides a 0.02 dB gain and 0.15 phase fine-tune resolution without adding additional front-end circuits. Considering 1 dB gain and 10 phase mismatch, the system EVM of 29.81 dB and ACPR of 34.56 dB can still be achieved for 5 MHz bandwidth 64-QAM OFDM signals.