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A 65-nm CMOS Fully Integrated Transceiver Module for 60-GHz Wireless HD Applications Alexandre Siligaris, Olivier Richard, Baudouin Martineau, Christopher Moune t, Fabrice Chaix, Romain Ferragut, Cedric Dehos, Jérôme Lanteri
65nm CMOS工艺集成60GHz无线HD收发模块，支持3.8Gbps传输。
65nm CMOS, 3.8 Gbps, 454 mW (RX), 1090 mW (TX)
60GHzCMOS收发模块无线HDOFDM
▸创新点1：65nm CMOS工艺集成 - 采用65纳米CMOS工艺实现全集成60GHz收发器，显著降低功耗（RX模式454mW，TX模式1090mW）并提升集成度，支持16QAM OFDM调制，实现3.8Gbps高速数据传输。
▸创新点2：低成本HTCC模块封装 - 通过高温共烧陶瓷（HTCC）模块封装技术，将硅芯片倒装焊在模块上，兼顾射频性能与制造成本，适合工业化量产。
▸创新点3：大波束宽度天线设计 - 集成宽波束天线于模块中，增强信号覆盖范围与连接稳定性，克服毫米波通信中方向性强的限制，提升实用场景适应性。
▸创新点4：多通道兼容性 - 支持60GHz频段的四个标准信道，灵活适应不同区域的频谱规范，扩展了设备的全球适用性。
Abstract
A fully integrated Wire lessHD compatible 60-GHz transceiver module in 65-nm CMOS process is presented, covering the four standard channels. The silicon die is flip-chipped on top of a low-cost HTCC module which also includes an external 65-nm CMOS PA and large beamwidth antennas targeting industrial manufacturability. The mo dule achieves a 16QAM OFDM mod- ulation wireless link with 3.8 Gbps over 1 m. The transceiver consumption is 454 mW in RX mode (including PLL) and 1090 mW in TX mode (including PLL and external PA).