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JSSC 2011第12期RF & Wireless65nmPLLVCO

A Low-Power GSMEDGEWCDMA Polar Transmitter in 65-nm CMOS Michael Youssef Alireza

65nm CMOS工艺实现低功耗多模极性发射机,采用线性化VCO和两点注入PLL技术。
WCDMA模式下42/58-dBc ACLR(5/10MHz), 159-dBc/Hz接收带噪声, 2.9% EVM@0dBm, 40mA@3.6V
CMOS低功耗多模极性发射机VCO线性化
基于两点注入PLL的极性发射机架构
嵌套宽带反馈环路实现VCO线性化
AM-PM路径差分延迟自校准技术
Abstract
Mohammadi, Hooman Darabi, Senior Member , IEEE, and Asad A. Abidi , Fellow, IEEE Abstract—A low-power, multimode polar transmitter based on a two-point injection PLL with a linearized VCO is implemented in 65-nm CMOS technology. A wideband feedback loop, nested in- side the PLL with negligible area and power consumption over- head, linearizes and accurately controls the tuning characteristic of the VCO, which is a key requirement when directly modulating the oscillator. Differential delay betwe