← 返回 JSSC 论文列表JSSC 2011第12期Data Converters0.18μm
A Third-Order DT 16Modulator Using Noise-Shaped Bi-Directional Single-Slope Quan
提出一种基于双斜率ADC的新型模数转换器，通过改进放电相位实现三阶噪声整形。
0.18μm CMOS, 1.5V, 50MHz采样速度, 78dB SNDR, 2.9mW功耗
模数转换器噪声整形双斜率ADCCMOS量化器
▸改进双斜率ADC放电相位实现一阶噪声整形
▸量化器与主动加法器合并减少元件
▸双向放电方案降低时钟速度和偏置精度要求
Abstract
This paper describes a new analog-to-digital con-
verter based on the traditional dual-slope ADC operation. With
a small modification to the discharging phase of the dual-slope
ADC, first-order quantization noise shaping is achieved. This
quantizer is used in a second-order loop filter and results in an
overall third-order quantization noise shaping. To remove the
need for any extra active element, this quantizer is merged with the
active adder. In this fashion, the multi-bit flash ADC is removed
an